answered
2018-01-04 02:00:13 +0200
Only Intel x86 CPUs have this design bug (but for at least 10 years!), which KPTI (aka KAISER aka FUCKWIT) addresses by vigorously separating Kernel and User address spaces (specifically by separating the MMU's translation tables and TLBs as much as possible by software / the kernel; something which was assumed to be granted by the hardware, before this surfaced).
There is no reason to assume that AMDs x86 CPUs (AMD's Tom Lendacky already stated that their designs are not affected) and other CPU designs (e.g. ARM, MIPS) have this hardware bug, as it is the side effect of an incorrectly implemented optimisation designed by Intel engineers (i.e. it is extremely unlikely that another CPU design team implemented the same optimisation in exactly the same, faulty way). As this optimisation was developed by Intel, supposedly it is patented or was a company secret before this revelation (haven't done a tedious patent research yet, as most likely others will).
But as KASLR (Kernel Address Space Layout Randomization) has been shown to be circumvented a few times (and thus enhanced thereafter a couple of times already, even though most of these "attacks" were impractical to use, i.e. rather academic), a better separation of Kernel and User address spaces is a good hardening measure: That is why the changes for Intel x86 CPUs are considered to be adapted by others as well.
Well, to be honest, while glancing over the ARM64 changes, I am a little bit surprised to see ARM (the company) reacting quickly with such a large and intrusive set of changes. Maybe they really have some reason to be afraid, too, as this would have been a chance to calmly state "Not our business", as AMD did. Still, as ARM64 is an completely independent design and architecture compared to x86, at most it is some similar, but not the same hardware design flaw they are trying to cover up.
More likely it is just a hardening measure, roughly following the KPTI design (now that the Kernel infrastructure for this is already there), which is also easier to implement for ARM64 (and presumably with far less of a performance hit, i.e. negligible in contrast to x86).
For Intel this is a doomsday scenario, far worse than the much hyped Pentium FDIV bug 20 (or was it 25) years ago. It will be interesting to see how they handle this politically.
In my understanding, ARM systems may be patched to prevent any risk of leakage. No explicit bug detected so far.
objectifnul ( 2018-01-03 14:58:59 +0200 )editSo far. All affected systems have to be patched at OS level. Some of them will suffer performance drawdown.
lakutalo ( 2018-01-03 15:07:11 +0200 )editWell... it's broken on AMD, ARM and Intel CPUs. I hope Jolla will release this alongside 2.1.4
pisarz1958 ( 2018-01-04 01:52:35 +0200 )editThanks for your ancillary detailedness @lpr, much appreciated!
lakutalo ( 2018-01-04 18:34:48 +0200 )editAmong my readings on the subject, I understand that corrections of these faults are going to impact on the performances of the processor between 5 and 30 % to see 50 % of calculation time :-(
For my Jolla 1 what is going to be the impact of the patch in term of performances?
mips_tux ( 2018-01-04 18:42:40 +0200 )edit